142 lines
5.9 KiB
Markdown
142 lines
5.9 KiB
Markdown
---
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tags:
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- CPU
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- computer-architecture
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---
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# CPU architecture
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At the core of a computer sits the Central Processing Unit. This is the assembly
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of chips that execute all computation. Instructions are passed to the CPU along
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the data bus part of the [system bus](Bus.md) from the
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memory. The [kernel](The_kernel.md), also residing in memory,
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sequences and schedules the sending of data to the CPU and manages requests from
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the CPU for data in memory.
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The CPU comprises three core components:
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- Registers (a type of memory positioned on the same chip as the CPU )
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- the Arithmetic Logic Unit (ALU)
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- the Control Unit (CU)
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> This method of putting together a computer is known as the **Von Neumann
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> Architecture**. It was devised by John von Neumann in about 1945, well before
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> any of the components that would be needed to produce it had actually been
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> invented.
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## Registers
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This is the part of the CPU that stores data. The memory cells that comprise it
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do not have [capacitors](Memory.md) (unlike RAM)
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so they cannot store very much data but they work faster, which is what is
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important. Because their memory capacity is so small, we measure the size of
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registers in bits rather than bytes.
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In terms of speed, registers sit at the top part of the overall
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[memory hierarchy](Memory.md#the-memory-hierarchy).
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There are five main types of register in the CPU:
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| Register type | What it stores |
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| ----------------------- | ----------------------------------------------------------- |
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| Accumulator | The results of calculations |
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| Instruction Register | The DRAM address of the **instruction** to be processed |
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| Memory Address Register | The DRAM address of the **data** to be processed |
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| Memory Data Register | The store of the data that is currently being processed |
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| Program Counter | The RAM address of the **next instruction** to be processed |
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## Arithmetic Logic Unit
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See [Arithmetic Logic Unit](Arithmetic_Logic_Unit.md)
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## Control Unit
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The CPU's [controller](Chipset_and_controllers.md). It
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takes the instructions in binary form from RAM memory (separate from the CPU,
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but connected) and then signals to the to ALU and memory registers what it is
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supposed to do to execute the instructions. Think of it as the overseer that
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gets the ALU and registers to work together to run program instructions.
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## The system clock
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Whilst modern CPUs and multithreading make it appear as though the CPU is
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capable of running multiple processes at once, access to the CPU is in fact
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sequential. The illusion of simultaneous computation is due to the fact the
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processor is so fast that we do not detect the sequential changes. For this to
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happen, the CPU needs to have a means of scheduling and sequencing processes.
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This is made possible through the system clock, hence when talking about the
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speed of the CPU we do so with reference to _clock speeds_ and the _clock
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cycle_.
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The clock's circuitry is based on a quartz crystal system like that used in
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watches. At precisely timed intervals, the clock sends out pulses of electricity
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that cause bits to move from place to place within
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[logic gates](Logic_gates.md) or
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between logic gates and
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[registers](CPU_architecture.md#registers). This is
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covered in greater detail in the discussion of
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[clock signals in digital circuits](Clock_signals.md).
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Simple instructions such as add can often be executed in just one clock cycle,
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whilst complex operations such as divide will require a number of smaller steps,
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each using one cycle.
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We measure the speed of a chip process within the CPU in **Hertz (Hz)**. One
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Hertz is equivalent to _1 cycle per second_ where a "cycle" is equivalent to a
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single clock **tick**. Thus a tick covers a period of 1 second.
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A speed of 2GHz for example means two billion cycles per second. This would mean
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that the clock was completing two billion cycles at each tick. It is clock speed
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that is being referred to when computers are marketed in terms of the number of
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Hz a processor possesses.
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## Processing cycles
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Each "cycle" is the execution of a process that commences once the
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[kernel](The_kernel.md) hands control to the CPU. Each cycle
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follows a sequence of events known as
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[fetch, decode, and execute](Fetch_decode_execute.md).
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## Electromagnetism: broader scientific context
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Hertz was the scientist who detected
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[electromagentic waves](Electromagnetism.md).
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We use Hertz as a measure of the frequency of electromatic wave cycles in a
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signal.
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As the diagram above shows, a cycle is equal to one ascending and one descending
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crest. The more cycles per time unit, the greater the Hertz. We see the Hz
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increase as the number of cycles increases over time.
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## Processor cores
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// TODO: add to dedicated file
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// Add diagram The vast majority of general purpose computers are multi-core.
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This means that the CPU contains more than one processing unit. They are best
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thought of as mini-CPUs within the main CPU since they each have the same
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overall Von Neumann architecture.
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With Intel processors the two main consumer processors are the i5 and i7. The
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latter has more cores than the former. Consequently it has faster clock speeds
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and greater concurrency due to increased threads.
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### Cache access
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// See pp.129
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### History
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The development of multi-core processors emerged because practical limits began
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to be reached when trying to increase the clock speeds of processors. For a
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period, increased transistor density meant that there were steady increases in
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clock speeds. This meant that more instructions could be executed per second.
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When the 3GHz level was reached it became clear that pushing a CPU beyond this
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led to excessive heat production and the logic gates not being able to keep up
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at those speeds. Instead of maxing out the clock rate, attention turned to
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running multiple instructions in parallel in order to increase performance.
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