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<!--replace-end-7--><!--replace-end-4--><!--replace-end-1--></head><body><div class="ui fluid container universe"><!--replace-start-2--><!--replace-start-3--><!--replace-start-6--><div class="ui text container" id="zettel-container" style="position: relative"><div class="zettel-view"><article class="ui raised attached segment zettel-content"><div class="pandoc"><h1 id="title-h1">CPU architecture</h1><p>At the core of a computer sits the Central Processing Unit. This is the assembly of chips that execute all computation. Instructions are passed to the CPU along the data bus part of the <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: Bus"><a href="Bus.html">system bus</a></span></span> from the memory. The <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: The kernel"><a href="The_kernel.html">kernel</a></span></span>, also residing in memory, sequences and schedules the sending of data to the CPU and manages requests from the CPU for data in memory.</p><p>The CPU comprises three core components:</p><ul><li>Registers (a type of memory positioned on the same chip as the CPU )</li><li>the Arithmetic Logic Unit (ALU)</li><li>the Control Unit (CU)</li></ul><p><img src="/static/von_neumann_architecture.jpeg" /></p><blockquote><p>This method of putting together a computer is known as the <strong>Von Neumann Architecture</strong>. It was devised by John von Neumann in about 1945, well before any of the components that would be needed to produce it had actually been invented.</p></blockquote><h2 id="registers">Registers</h2><p>This is the part of the CPU that stores data. The memory cells that comprise it do not have <span class="zettel-link-container errors"><span class="zettel-link" title="Wiki-link does not refer to any existing zettel"><a>Memory</a></span></span> (unlike RAM) so they cannot store very much data but they work faster, which is what is important. Because their memory capacity is so small, we measure the size of registers in bits rather than bytes.</p><p>In terms of speed, registers sit at the top part of the overall <a href="Memory.md#the-memory-hierarchy">memory hierarchy</a>.</p><p>There are five main types of register in the CPU:</p><table class="ui table"><thead><tr><th>Register type</th><th>What it stores</th></tr></thead><tbody><tr><td>Accumulator</td><td>The results of calculations</td></tr><tr><td>Instruction Register</td><td>The DRAM address of the <strong>instruction</strong> to be processed</td></tr><tr><td>Memory Address Register</td><td>The DRAM address of the <strong>data</strong> to be processed</td></tr><tr><td>Memory Data Register</td><td>The store of the data that is currently being processed</td></tr><tr><td>Program Counter</td><td>The RAM address of the <strong>next instruction</strong> to be processed</td></tr></tbody></table><h2 id="arithmetic-logic-unit">Arithmetic Logic Unit</h2><p>See <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: Arithmetic Logic Unit (ALU)"><a href="Arithmetic_Logic_Unit.html">Arithmetic Logic Unit</a></span></span></p><h2 id="control-unit">Control Unit</h2><p>The CPU’s <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: Chipset and controllers"><a href="Chipset_and_controllers.html">controller</a></span></span>. It takes the instructions in binary form from RAM memory (separate from the CPU, but connected) and then signals to the to ALU and memory registers what it is supposed to do to execute the instructions. Think of it as the overseer that gets the ALU and registers to work together to run program instructions.</p><h2 id="the-system-clock">The system clock</h2><p>Whilst modern CPUs and multithreading make it appear as though the CPU is capable of running multiple processes at once, access to the CPU is in fact sequential. The illusion of simultaneous computation is due to the fact the processor is so fast that we do not detect the sequential changes. For this to happen, the CPU needs to have a means of scheduling and sequencing processes. This is made possible through the system clock, hence when talking about the speed of the CPU we do so with reference to <em>clock speeds</em> and the <em>clock cycle</em>.</p><p>The clock’s circuitry is based on a quartz crystal system like that used in watches. At precisely timed intervals, the clock sends out pulses of electricity that cause bits to move from place to place within <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: Logic gates"><a href="Logic_gates.html">logic gates</a></span></span> or between logic gates and <a href="CPU_architecture.md#registers">registers</a>. This is covered in greater detail in the discussion of <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: Clock signals"><a href="Clock_signals.html">clock signals in digital circuits</a></span></span>.</p><p>Simple instructions such as add can often be executed in just one clock cycle, whilst complex operations such as divide will require a number of smaller steps, each using one cycle.</p><p>We measure the speed of a chip process within the CPU in <strong>Hertz (Hz)</strong>. One Hertz is equivalent to <em>1 cycle per second</em> where a “cycle” is equivalent to a single clock <strong>tick</strong>. Thus a tick covers a period of 1 second.</p><p>A speed of 2GHz for example means two billion cycles per second. This would mean that the clock was completing two billion cycles at each tick. It is clock speed that is being referred to when computers are marketed in terms of the number of Hz a processor possesses.</p><h2 id="processing-cycles">Processing cycles</h2><p>Each “cycle” is the execution of a process that commences once the <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: The kernel"><a href="The_kernel.html">kernel</a></span></span> hands control to the CPU. Each cycle follows a sequence of events known as <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: Fetch, decode, execute, store"><a href="Fetch_decode_execute.html">fetch, decode, and execute</a></span></span>.</p><h2 id="electromagnetism-broader-scientific-context">Electromagnetism: broader scientific context</h2><p>Hertz was the scientist who detected <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: Electromagnetism"><a href="Electromagnetism.html">electromagentic waves</a></span></span>. We use Hertz as a measure of the frequency of electromatic wave cycles in a signal.</p><p><img src="/static/hertz_wave_freq.gif" /></p><p>As the diagram above shows, a cycle is equal to one ascending and one descending crest. The more cycles per time unit, the greater the Hertz. We see the Hz increase as the number of cycles increases over time.</p><h2 id="processor-cores">Processor cores</h2><p>// TODO: add to dedicated file</p><p>// Add diagram The vast majority of general purpose computers are multi-core. This means that the CPU contains more than one processing unit. They are best thought of as mini-CPUs within the main CPU since they each have the same overall Von Neumann architecture.</p><p>With Intel processors the two main consumer processors are the i5 and i7. The latter has more cores than the former. Consequently it has faster clock speeds and greater concurrency due to increased threads.</p><h3 id="cache-access">Cache access</h3><p>// See pp.129</p><h3 id="history">History</h3><p>The development of multi-core processors emerged because practical limits began to be reached when trying to increase the clock speeds of processors. For a period, increased transistor density meant that there were steady increases in clock speeds. This meant that more instructions could be executed per second.</p><p>When the 3GHz level was reached it became clear that pushing a CPU beyond this led to excessive heat production and the logic gates not being able to keep up at those speeds. Instead of maxing out the clock rate, attention turned to running multiple instructions in parallel in order to increase performance.</p></div></article><nav class="ui attached segment deemphasized backlinksPane" id="neuron-backlinks-pane"><h3 class="ui header">Backlinks</h3><ul class="backlinks"><li><span class="zettel-link-container cf"><span class="zettel-link"><a href="What_is_memory.html">What is memory ?</a></span></span><ul class="context-list" style="zoom: 85%;"><li class="item"><div class="pandoc"><p>When a <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: CPU architecture"><a href="CPU_architecture.html">CPU</a></span></span> executes a program, it needs a place to store the program’s <strong>instructions</strong> and <strong>related data</strong>. This is the role of memory.</p></div></li></ul></li><li><span class="zettel-link-container cf"><span class="zettel-link"><a href="The_History_of_Computing_Swade.html">History of Computing (Swade, 2022 )</a></span></span><ul class="context-list" style="zoom: 85%;"><li class="item"><div class="pandoc"><p>An experimental computer intended to create the <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: CPU architecture"><a href="CPU_architecture.html">von Neumann architecture</a></span></span> using <span class="zettel-link-container errors"><span class="zettel-link" title="Wiki-link does not refer to any existing zettel"><a>Williams_Tube_RAM</a></span></span></p></div></li></ul></li><li><span class="zettel-link-container cf"><span class="zettel-link"><a href="Motherboard.html">Motherboard</a></span></span><ul class="context-list" style="zoom: 85%;"><li class="item"><div class="pandoc"><p>The motherboard is the foundation of a computer. It allocates power and allows communication to and between the <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: CPU architecture"><a href="CPU_architecture.html">CPU</a></span></span>, <span class="zettel-link-container errors"><span class="zettel-link" title="Wiki-link does not refer to any existing zettel"><a>Memory</a></span></span>, <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: What are disks?"><a href="What_are_disks.html">harddisk</a></span></span> and all other hardware components.</p></div></li></ul></li><li><span class="zettel-link-container cf"><span class="zettel-link"><a href="Machine_code.html">Machine code</a></span></span><ul class="context-list" style="zoom: 85%;"><li class="item"><div class="pandoc"><p>No matter how a program was originally written, it eventually needs to execute on a <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: CPU architecture"><a href="CPU_architecture.html">CPU</a></span></span> as a series of machine language instructions.</p></div></li></ul></li><li><span class="zettel-link-container cf"><span class="zettel-link"><a href="Fetch_decode_execute.html">Fetch, decode, execute, store</a></span></span><ul class="context-list" style="zoom: 85%;"><li class="item"><div class="pandoc"><p><em>Fetch, decode, execute</em> is the operating cycle of the CPU. We will run through how this works with reference to the <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: CPU architecture"><a href="CPU_architecture.html">CPU architecture</a></span></span>.</p></div></li></ul></li><li><span class="zettel-link-container cf"><span class="zettel-link"><a href="Assembly.html">Assembly</a></span></span><ul class="context-list" style="zoom: 85%;"><li class="item"><div class="pandoc"><p><span class="zettel-link-container cf"><span class="zettel-link"><a href="Hexadecimal_number_system.html">Hexadecimal number system</a></span></span>, <span class="zettel-link-container cf"><span class="zettel-link"><a href="Instruction_set_architectures.html">Instruction Set Architectures</a></span></span>, <span class="zettel-link-container cf"><span class="zettel-link"><a href="CPU_architecture.html">CPU architecture</a></span></span></p></div></li></ul></li><li><span class="zettel-link-container cf"><span class="zettel-link"><a href="Arithmetic_Logic_Unit.html">Arithmetic Logic Unit (ALU)</a></span></span><ul class="context-list" style="zoom: 85%;"><li class="item"><div class="pandoc"><p>The ALU is the centerpiece or core of the <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: CPU architecture"><a href="CPU_architecture.html">CPU</a></span></span> architecture, where the binary calculations occur. All the other components on the CPU chip are appendanges to the execution that occurs within the ALU.</p></div></li></ul></li></ul></nav><nav class="ui attached segment deemphasized bottomPane" id="neuron-tags-pane"><div><span class="ui basic label zettel-tag" title="Tag">CPU</span><span class="ui basic label zettel-tag" title="Tag">computer-architecture</span></div></nav><nav class="ui bottom attached icon compact inverted menu blue" id="neuron-nav-bar"><!--replace-start-9--><!--replace-end-9--><a class="right item" href="impulse.html" title="Open Impulse"><i class="wave square icon"></i></a></nav></div></div><!--replace-end-6--><!--replace-end-3--><!--replace-end-2--><div class="ui center aligned container footer-version"><div class="ui tiny image"><a href="https://neuron.zettel.page"><img alt="logo" src="https://raw.githubusercontent.com/srid/neuron/master/assets/neuron.svg" title="Generated by Neuron 1.9.35.3" /></a></div></div></div></body></html> |