60 lines
		
	
	
	
		
			2.2 KiB
		
	
	
	
		
			Markdown
		
	
	
	
	
	
			
		
		
	
	
			60 lines
		
	
	
	
		
			2.2 KiB
		
	
	
	
		
			Markdown
		
	
	
	
	
	
---
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tags: [logic-gates, binary]
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---
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# Four-bit adder
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A single
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[half adder](Half_adder_and_full_adder.md#half-adder)
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and
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[full adder](Half_adder_and_full_adder.md#fufll-adder)
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allows us to calculate the sum of two 1-bit numbers, but this is not much use in
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practice. To approximate what is really happening at the circuit level in
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computers we need to be able to add bigger binary numbers. We will demonstrate
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how this can be achieved for a four-bit number (nibble) using repeated full
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adders and half adders.
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We want to be able to calculate the following sum:
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```
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0010
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0011
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____
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0101
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```
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We will achieve this by using three full adders and one half adder, moving from
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right to left. The half adder will be used at the beginning to calculate the
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least significant bit as it will have no carry-in. The subsequent three bits
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will all be added using a full adder.
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Let's walk through the process:
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>
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1. HA receives the bits $0$ and $1$ as inputs. It outputs $1$ as the sum bit and
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   $0$ as the carry-out.
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2. FA1 receives $0$ as the carry-in bit plus $1$ and $1$ as its input. This
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   means it has the following calculation to execute: $1 + 1 + 0$. This gives
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   $0$ as the sum bit and $1$ as the carry-out bit.
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3. FA2 receives $1$ as the carry-in (the carry-out from FA1) plus $0$ and $0$ as
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   its own inputs. $0 + 0 + 1$ gives us $1$ as the sum bit and $0$ as the
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   carry-out.
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4. Finally FA3 receives $0$ as its carry-in plus $0$ and $0$ as its inputs.
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   $0 + 0 + 0 = 0$, therefore its sum bit is $0$ and the overall sum of the four
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   bits is $0101$. There is no carry out as there are no more bits to add.
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## Ripple carry adder
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We notice that as the calculation proceeds, the carry bits propagate or _ripple_
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through the circuit. For this reason, a four-bit adder constructed in the manner
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of this circuit is called a **ripple carry adder**.
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There are two important consequences to note about this type of circuit:
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- Each carry bit that ripples to the next full adder introduces a small delay.
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  Therefore extending the circuit to handle more bits will make the circuit
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  slower overall.
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- Because the value of the bits changes through the course of the ripple, the
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  output of the circuit will be innacurate until all the carry bits have had
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  time to propagate.
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