74 lines
		
	
	
	
		
			2.2 KiB
		
	
	
	
		
			Markdown
		
	
	
	
	
	
			
		
		
	
	
			74 lines
		
	
	
	
		
			2.2 KiB
		
	
	
	
		
			Markdown
		
	
	
	
	
	
---
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tags: [nand-to-tetris]
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---
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# Hardware simulation
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In order to test our
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[HDL](Hardware_Description_Language.md) files we load
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them into the hardware simulator program. We will demonstrate this with the
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following XOR implementation:
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There are several simulation options:
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- interactive
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- script-based (where we load a test script into the simulator along with the
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  HDL file
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- comparative (running the HDL program against our intended output specified in
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  the `.cmp` file)
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The use-cases for each mode are based on the complexity of the chip you are
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evaluating. For a small chip, interactive and script-based testing would be
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sufficient but for much larger components like an ALU a comparative approach
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would be more manageable and efficient.
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## Interactive
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The image below shows a basic interactive usage of the simulator. We have
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uploaded the `Xor.hdl` file into the simulator and changed the input pins to
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`a=1, b=0` and clicked the calculator icon (representing "evaluation"). This
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then shows the output and internal pin values for these inputs.
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<img src="/home/thomas/repos/computer_science/img/hardware-sim-basic.png" >
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## Script-based
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This time we have clicked the script icon to load `Xor.tst`. This loads the test
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script into the main GUI panel on the left. We can step through each line of the
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test file and we will see the pin values update in accordance with the test.
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When this is run it automatically generates an output file in the source
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directory at `Xor.out`. This can be viewed within the simulator via the 'View'
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drop down.
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## Comparison-based
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With a comparison-based approach to chip testing we run a comparison against the
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`.out` file that the simulator generates when running the HDL program against a
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`.cmp` comparison file that we provide. Both are simply truth-tables. For XOR if
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the program matched the comparison specification both `Xor.out` and `Xor.cmp`
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would look like the following:
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```
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a | b | out
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-----------
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0 | 0 | 0
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0 | 1 | 1
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1 | 0 | 1
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1 | 1 | 0
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```
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You don't have to do anything to apply the comparison since the compare file
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will already be loaded as part of the test file's set up:
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```vhdl
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load Xor.hdl
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output file Xor.out
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compare-to Xor.cmp
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output-list a, b, out;
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set ...
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```
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