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<!--replace-end-7--><!--replace-end-4--><!--replace-end-1--></head><body><div class="ui fluid container universe"><!--replace-start-2--><!--replace-start-3--><!--replace-start-6--><div class="ui text container" id="zettel-container" style="position: relative"><div class="zettel-view"><article class="ui raised attached segment zettel-content"><div class="pandoc"><h1 id="title-h1">Machine code</h1><p>No matter how a program was originally written, it eventually needs to execute on a <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: CPU architecture"><a href="CPU_architecture.html">CPU</a></span></span> as a series of machine language instructions.</p><h2 id="example-machine-instruction">Example machine instruction</h2><p>The following machine instruction is an instruction that would be understood by an <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: Instruction Set Architectures"><a href="Instruction_set_architectures.html"> ARM ISA</a></span></span>. It moves the number <code>4</code> into the <code>r7</code> register:</p><pre><code class="language-none">11100011101000000111000000000100</code></pre><p>This 32-bit line of binary has a series of instructions embedded within it. We partition each part of the sequence below, from left to right, mapping it to the instruction:</p><table class="ui table"><thead><tr><th>Binary sequence</th><th>Instruction</th><th>Action</th></tr></thead><tbody><tr><td>1110</td><td>condition</td><td>always execute (unconditional)</td></tr><tr><td>00</td><td>–</td><td>–</td></tr><tr><td>1</td><td>immediate</td><td>value is in the last 8 bits</td></tr><tr><td>1101</td><td>opcode</td><td><code>mov</code> : move the value</td></tr><tr><td>0</td><td>–</td><td>–</td></tr><tr><td>0000</td><td>–</td><td>–</td></tr><tr><td>0111</td><td>destination register</td><td>destination is 0111 which means <code>r7</code></td></tr><tr><td>0000</td><td>–</td><td>–</td></tr><tr><td>00000100</td><td>immediate value</td><td>the binary representation of decimal ‘4’</td></tr></tbody></table><ul><li><p>The blank zeros are also instructions, they are just not used in this instruction</p></li><li><p>The condition sequence tells us the instruction should run in all conditions not only under certain circumstances</p></li><li><p>The immediate bit (<code>1</code>) tells us whether the the value we are accessing is contained within the instruction or whether it is stored in a register. In this scenario <code>1</code> means the value is in the instruction. If it were <code>0</code>, the register where the value is located would be specified elsewhere in the instruction (in one of the currently blank sequences).</p></li><li><p>The opcode correspoons to <code>mov</code> the value.</p></li><li><p>THe destination register details where the value should be moved to (<code>r7</code>)</p></li><li><p>Finally, the immediate value is equivalent to decimal <code>4</code></p></li></ul><h2 id="difficulty">Difficulty</h2><p>Binary sequences are hard to understand, even if converted to the <span class="zettel-link-container cf"><span class="zettel-link"><a href="Hexadecimal_number_system.html">Hexadecimal number system</a></span></span>. We have a better way of managing operations on the machine level: <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: Assembly"><a href="Assembly.html">assembly</a></span></span></p></div></article><nav class="ui attached segment deemphasized bottomPane" id="neuron-tags-pane"><div><span class="ui basic label zettel-tag" title="Tag">CPU</span><span class="ui basic label zettel-tag" title="Tag">binary</span><span class="ui basic label zettel-tag" title="Tag">computer-architecture</span><span class="ui basic label zettel-tag" title="Tag">hardware</span></div></nav><nav class="ui bottom attached icon compact inverted menu blue" id="neuron-nav-bar"><!--replace-start-9--><!--replace-end-9--><a class="right item" href="impulse.html" title="Open Impulse"><i class="wave square icon"></i></a></nav></div></div><!--replace-end-6--><!--replace-end-3--><!--replace-end-2--><div class="ui center aligned container footer-version"><div class="ui tiny image"><a href="https://neuron.zettel.page"><img alt="logo" src="https://raw.githubusercontent.com/srid/neuron/master/assets/neuron.svg" title="Generated by Neuron 1.9.35.3" /></a></div></div></div></body></html> |