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<!--replace-end-7--><!--replace-end-4--><!--replace-end-1--></head><body><div class="ui fluid container universe"><!--replace-start-2--><!--replace-start-3--><!--replace-start-6--><div class="ui text container" id="zettel-container" style="position: relative"><div class="zettel-view"><article class="ui raised attached segment zettel-content"><div class="pandoc"><h1 id="title-h1">Chipset and controllers</h1><p>A <strong>controller</strong> is simply a circuit that controls a process. The <strong>chipset</strong> is a combination of controllers placed on the same piece of silicon.</p><p>The chipset manages the data flow between the different components that comprise the <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: Motherboard"><a href="Motherboard.html">motherboard</a></span></span>: processor, <span class="zettel-link-container errors"><span class="zettel-link" title="Wiki-link does not refer to any existing zettel"><a>Memory</a></span></span>, <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: What are disks?"><a href="What_are_disks.html">harddisk</a></span></span> and peripherals.</p><p>Buses run in and out of the chipset into these key motherboard components. The main chipset is a kind of junction that sits between the memory and CPU through which the <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: Bus"><a href="Bus.html">system bus</a></span></span> passes.</p><p>The chipset is sometimes called the “glue” or “traffic controller” of the motherboard or <em>an intelligent intersection of buses</em>.</p></div></article><nav class="ui attached segment deemphasized backlinksPane" id="neuron-backlinks-pane"><h3 class="ui header">Backlinks</h3><ul class="backlinks"><li><span class="zettel-link-container cf"><span class="zettel-link"><a href="Role_of_memory_in_computation.html">The role of memory in computation</a></span></span><ul class="context-list" style="zoom: 85%;"><li class="item"><div class="pandoc">The CPU processes this instruction and then sends a request accross the address bus part of the system bus for the next instruction to the memory controller within the <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: Chipset and controllers"><a href="Chipset_and_controllers.html">chipset</a></span></span>.</div></li></ul></li><li><span class="zettel-link-container cf"><span class="zettel-link"><a href="CPU_architecture.html">CPU architecture</a></span></span><ul class="context-list" style="zoom: 85%;"><li class="item"><div class="pandoc"><p>The CPU’s <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: Chipset and controllers"><a href="Chipset_and_controllers.html">controller</a></span></span>. It takes the instructions in binary form from RAM memory (separate from the CPU, but connected) and then signals to the to ALU and memory registers what it is supposed to do to execute the instructions. Think of it as the overseer that gets the ALU and registers to work together to run program instructions.</p></div></li></ul></li></ul></nav><nav class="ui attached segment deemphasized bottomPane" id="neuron-tags-pane"><div><span class="ui basic label zettel-tag" title="Tag">computer-architecture</span><span class="ui basic label zettel-tag" title="Tag">hardware</span></div></nav><nav class="ui bottom attached icon compact inverted menu blue" id="neuron-nav-bar"><!--replace-start-9--><!--replace-end-9--><a class="right item" href="impulse.html" title="Open Impulse"><i class="wave square icon"></i></a></nav></div></div><!--replace-end-6--><!--replace-end-3--><!--replace-end-2--><div class="ui center aligned container footer-version"><div class="ui tiny image"><a href="https://neuron.zettel.page"><img alt="logo" src="https://raw.githubusercontent.com/srid/neuron/master/assets/neuron.svg" title="Generated by Neuron 1.9.35.3" /></a></div></div></div></body></html> |