diff --git a/Electronics/Integrated_circuits.md b/Electronics/Integrated_circuits.md new file mode 100644 index 0000000..f698672 --- /dev/null +++ b/Electronics/Integrated_circuits.md @@ -0,0 +1,7 @@ +--- +title: Integrated circuits +categories: + - Electronics + - Hardware +tags: [logic-gates] +--- diff --git a/Electronics/Switches_and_transistors.md b/Electronics/Transistors.md similarity index 86% rename from Electronics/Switches_and_transistors.md rename to Electronics/Transistors.md index 4f96e97..108f22a 100644 --- a/Electronics/Switches_and_transistors.md +++ b/Electronics/Transistors.md @@ -1,5 +1,5 @@ --- -title: Switches and transistors +title: Transistors categories: - Computer Architecture - Electronics @@ -7,7 +7,7 @@ categories: tags: [logic-gates, binary, memory] --- -# Switches and transistors +# Transistors In the discussion of [digital circuits](/Electronics/Digital_circuits.md) we noted that a digital circuit requires that electrical phenomena be treated as discrete rather than continuous values. Although a given voltage at a point in the circuit can vary widely, in order to represent the binary states of 'on' and 'off' we need it to remain fixed within certain narrow parameters. Typically a voltage between 2V - 5V for the 'on' state and a voltage between 0V - 0.8V for the 'off' state. @@ -59,8 +59,10 @@ When the voltate at the base is low (in the diagram it is grounded to ensure thi With the basic element of the transistor established, we can combine transistors to create logic gates. A logic gate is a combination/sequence of transistors where the logical function is represented by the characteristic input and output voltages. -For example to create an AND gate we would have two voltage inputs going into two transistors that are connected in sequence. The two transistors create a continuous line going from the collector of one to the emitter of the other. If either voltage input is low then the voltage of the combined line is low and there is no current flowing, and vice versa for the "on" state: +For example to create an [AND](/Hardware/Logic_Gates/And_gate.md) gate we would have two voltage inputs going into two transistors that are connected in sequence. The two transistors create a continuous line going from the collector of one to the emitter of the other. If either voltage input is low then the voltage of the combined line is low (equivalent to the circuit being broken) and there is no current flowing. ![](/img/and-transistor.png) +Below, an [OR](/Hardware/Logic_Gates/Or_gate.md) has been constructed with transistors. If a voltage is applied to the base of either transistor, the current reaches the V-out terminal. + ![](/img/or-transistor.svg) diff --git a/Hardware/Logic_Gates/And_gate.md b/Hardware/Logic_Gates/And_gate.md index 1717290..18b00ed 100644 --- a/Hardware/Logic_Gates/And_gate.md +++ b/Hardware/Logic_Gates/And_gate.md @@ -5,13 +5,14 @@ categories: - Hardware tags: [logic-gates] --- + # AND gate Just as we can create `NOT` logic from a NAND gate, without the `AND` conditions, we can create a circuit that exemplifies the truth conditions of `AND` just by discluding those of those of `NOT`. When we attach two NAND gates in sequence connected to two switches as input this creates the following binary conditions: -```` +``` A B Output _ _ _____ @@ -19,19 +20,19 @@ _ _ _____ 1 0 0 (2) 0 1 0 (3) 0 0 0 (4) -```` +``` Which is identical to the truth table for `AND` : -```` +``` p q p & q _ _ _____ t t t (1) t f f (2) f t f (3) -f f f (4) -```` +f f f (4) +``` **An AND at 0 0 :** @@ -40,12 +41,5 @@ f f f (4) **AND at 1 0 or 0 1 :** ![Screenshot_2020-08-25_at_15.05.20.png](../../img/Screenshot_2020-08-25_at_15.05.20.png) - **AND at 1 1** ![Screenshot_2020-08-25_at_15.05.36.png](../../img/Screenshot_2020-08-25_at_15.05.36.png) - -### Symbol for `AND` gate - -It's very similar to NAND so be careful not to confuse it - -![Pasted image 20220319173651.png](../../img/Pasted_image_20220319173651.png) \ No newline at end of file