Create script to rename image URLs and apply

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thomasabishop 2022-12-29 20:22:34 +00:00
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commit 0d428fd677
242 changed files with 1393 additions and 173 deletions

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@ -2,7 +2,7 @@
tags: [algorithms]
---
![Screenshot_2021-05-11_at_18.55.23.png](../img/Screenshot_2021-05-11_at_18.55.23.png)
![Screenshot_2021-05-11_at_18.55.23.png](../_img/Screenshot_2021-05-11_at_18.55.23.png)
_Summary of the main classes of algorithmic complexity_
## Distinguish algorithms from programs
@ -65,7 +65,7 @@ If we say that it takes 1ms for two integers to be summed, this gives us the fol
| 4 | 4 |
| 5 | 5 |
If we plotted this as a graph it is clear that this is equivalent to a linear distribution:![lin.svg](../img/lin.svg)
If we plotted this as a graph it is clear that this is equivalent to a linear distribution:![lin.svg](../_img/lin.svg)
Algorithms which display this distribution are therefore called **linear algorithms**.
@ -134,7 +134,7 @@ If the input had length 4, the runtime would be 16 or 4x4. For every execution o
This is not a linear algorithm because as n grows the runtime increases as a factor of it. Therefore the runtime is not growing proportional to the size of the input, it is growing proportional to the size of the input squared.
Graphically this is represented with a curving lines as follows:
![square.svg](../img/square.svg)
![square.svg](../_img/square.svg)
We can clearly see that as n grows, the runtime gets steeper and more pronounced,
@ -176,7 +176,7 @@ For example, with $\log 25$:
Back to algorithms: $O(\log n)$ is a really good complexity to have. It is close to O(1) and in between O(1) and O(n). Represented graphically, it starts of with a slight increase in runtime but then quickly levels off:
![Screenshot_2021-05-11_at_18.51.02.png](../img/Screenshot_2021-05-11_at_18.51.02.png)
![Screenshot_2021-05-11_at_18.51.02.png](../_img/Screenshot_2021-05-11_at_18.51.02.png)
Many sorting algorithms run in log n time, as does recursion.
@ -227,7 +227,7 @@ When seeking to simplify algorithms to their most general level of complexity, w
With this in mind we can break down the `findSum` function like so:
![breakdown.svg](../img/breakdown.svg)
![breakdown.svg](../_img/breakdown.svg)
This gives us:

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@ -45,8 +45,8 @@ There is a distinction between buses that use serial and buses that use parallel
Serial Transmission is the type of transmission in which a single communication link is used to transfer the data from an end to another. On other hand Parallel Transmission is the transmission in which multiple parallel links are used that transmit each bit of data simultaneously.
<img src="../img/serial-transmission.jpg" width="800px"/>
<img src="../img/parallel-transmission.jpg" width="800px"/>
<img src="../_img/serial-transmission.jpg" width="800px"/>
<img src="../_img/parallel-transmission.jpg" width="800px"/>
- Serial buses are cheaper to implement than parallel buses
- Serial buses operate at greater [latency](/Computer_Architecture/Bus.md#latency) than parallel buses

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@ -42,7 +42,7 @@ This is the heart of the CPU; all the other components on the CPU chip are appen
Below is a schematic of a series of logical circuits within the CPU core:
![74181aluschematic.png](/img/74181aluschematic.png)
![74181aluschematic.png](/_img/74181aluschematic.png)
### Processor cores
@ -74,6 +74,6 @@ Each "cycle" is the execution of a process that commences once the [kernel](/Ope
Hertz was the scientist who detected electromagentic waves and more broadly in science, we use Hertz to measure the frequency of electromatic wave cycles in a signal.
![](/img/hertz_wave_freq.gif)
![](/_img/hertz_wave_freq.gif)
As the diagram above shows, a cycle is equal to one ascending and one descending crest. The more cycles per time unit, the greater the Hertz. We see the Hz increase as the number of cycles increases over time.

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@ -10,7 +10,7 @@ tags: [CPU, processors]
The [Little Man Computer](https://peterhigginson.co.uk/lmc/) is a simplified computer that works on Von Neuman principles. It has all the CPU components we have detailed above. It is programmed in machine code but for simplicity it uses the denary rather than the binary number system.
![LMC_5.gif](/img/LMC_5.gif)
![LMC_5.gif](/_img/LMC_5.gif)
On the left is the instruction set. Each number constitutes and execution routine and the `xx` stand for the address in RAM that the execution will work on.

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@ -23,7 +23,7 @@ We won't use an actual HDL language, instead we will use a simplified toy langua
We will create an HDL program for an XOR gate that is implemented through the following arrangement of NOT, AND, and OR gates:
![](/img/xor-hdl.png)
![](/_img/xor-hdl.png)
### HDL file (`Xor.hdl`):

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@ -24,4 +24,4 @@ When using a module as a building block you are to focus exclusively on the modu
The design of the diagram below emphasises the role of abstraction and modularity in the movement from transistors to chips:
![](/img/hardware-abstraction-hierarchy.png)
![](/_img/hardware-abstraction-hierarchy.png)

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@ -43,7 +43,7 @@ The table below details the relative speeds of the different types of memory and
The diagram below compares the different forms of memory within a computing device in terms of speed, monetary cost and capacity:
![](/img/Memory-Hierarchy.jpg)
![](/_img/Memory-Hierarchy.jpg)
## References

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@ -15,7 +15,7 @@ The following steps outline the way in which memory interacts with the processor
> This is a simplified account; it is not the case that only single requests are passed back and forth. This would be inefficient and time-wasting. The kernel sends to the CPU not just the first instruction in the requested file but also a number of instructions that immediately follow it.
![](/img/memory-flow.svg)
![](/_img/memory-flow.svg)
Every part of the above process - the journey accross the bus, the lookup in the controller, the operations on the DRAM, the journey back accross the bus - takes muliple CPU clock cycles.

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@ -8,7 +8,7 @@ tags:
_Visualization of the queue data structure_
![queue.svg](../img/queue.svg)
![queue.svg](../_img/queue.svg)
## A queue is a sequential data structure and most similar to a stack

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@ -13,7 +13,7 @@ More generally recursion means when a thing is defined in terms of itself. There
## Schema
The general structure of a recursive function is as follows:
![javascript-recursion.png](../img/javascript-recursion.png)
![javascript-recursion.png](../_img/javascript-recursion.png)
## Why use recursive functions?
@ -111,4 +111,4 @@ if (num > 0) {
}
```
![javascript-factorial 1.png](../img/javascript-factorial%201.png)
![javascript-factorial 1.png](../_img/javascript-factorial%201.png)

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@ -6,10 +6,10 @@ tags:
---
_A stack visualised vertically_
![stack2.svg](../img/stack2.svg)
![stack2.svg](../_img/stack2.svg)
_A stack visualised horizontally_
![stack1.svg](../img/stack1.svg)
![stack1.svg](../_img/stack1.svg)
## A stack is a linear data structure that observes LIFO

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@ -72,7 +72,7 @@ server.listen().then(() => {
When we access the local URL we are able to access the Apollo server using the Explorer GUI. This automatically loads our schema and is basically a more fancy version of GraphiQL:
![](/img/apollo-explorer.png)
![](/_img/apollo-explorer.png)
It makes it easy to read descriptions of the dataypes and to construct queries by clicking to insert fields.

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@ -6,4 +6,4 @@ tags: [graphql]
# The journey of a GraphQL query
![](/img/graphql-journey-two.svg)
![](/_img/graphql-journey-two.svg)

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@ -26,7 +26,7 @@ From the point of view of the backend, GraphQL is a **runtime** that provides a
Client requests are sent over HTTPS and the data is typically returned in the form of JSON:
![](/img/graphql-architecture.png)
![](/_img/graphql-architecture.png)
## Implementation overview
@ -83,15 +83,15 @@ With a REST API if you require multiple resources you have to make multiple requ
The REST scenario:
![](/img/REST_request-load.png)
![](/_img/REST_request-load.png)
The GraphQL scenario:
![](/img/graphQL_request_load.png)
![](/_img/graphQL_request_load.png)
### Abstraction of multiple services
![](/img/graphql_multiple_resources.png)
![](/_img/graphql_multiple_resources.png)
### Stops overfetching

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@ -44,4 +44,4 @@ When we run this, we call the `save` method on the Mongoose schema. We will then
This will also be reflected in Compass:
![](/img/mongo-doc-added.png)
![](/_img/mongo-doc-added.png)

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@ -25,4 +25,4 @@ This will run continuously in the terminal and should say somewhere that it is w
_Compass_ is a graphical interface for viewing and interacting with the data in your Mongo database. It will automatically load to the default Mongo port: `27017`.
![](/img/mongo-compass.png)
![](/_img/mongo-compass.png)

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@ -61,10 +61,10 @@ const course = new Course({
});
```
![](/img/mongoose-hierarchy.svg)
![](/_img/mongoose-hierarchy.svg)
## Outcome
Having created a database, connected to it with Mongoose, and created a model we will see our collection reflected in Compass:
![](img/../../../img/mongo-collection.png)
![](img/../../../_img/mongo-collection.png)

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@ -16,4 +16,4 @@ Although Mongo is not a relational database it has a structure that we can under
A document is a container comprising key-value pairs in the manner of an object.
![](/img/mongo-db-structure.svg)
![](/_img/mongo-db-structure.svg)

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@ -8,7 +8,7 @@ tags: [relational-database]
Tables, fields and records are the basic building blocks of databases
![](/img/FL-Databases-1.5_terminology.gif)
![](/_img/FL-Databases-1.5_terminology.gif)
## Table

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@ -76,7 +76,7 @@ ON model.model_id = sales.model_id; -- Specify the match criteria
We can represent the logical relationship that obtains between the `sales` and `model` tables as follows:
![](/img/sql-inner-join.png)
![](/_img/sql-inner-join.png)
## Outer joins
@ -118,7 +118,7 @@ In the context of our dataset, in the _sales_ database we have a row where there
The logical relationship sustained between `sales` and `model` by a left inner join is represented in the following diagram:
![](/img/sql-left-outer-join.png)
![](/_img/sql-left-outer-join.png)
#### Implementation
@ -153,7 +153,7 @@ In the context of our dataset, in the _model_ database we have a row where there
The logical relationship sustained between `sales` and `model` by a right inner join is represented in the following diagram:
![](/img/sql-right-outer-join.png)
![](/_img/sql-right-outer-join.png)
#### Implementation
@ -191,7 +191,7 @@ In the context of our dataset it would result in the following table being gener
Represented by the following diagram:
![](/img/sql-full-outer-join.png)
![](/_img/sql-full-outer-join.png)
#### Implementation

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@ -9,7 +9,7 @@ tags: [analogue, digital]
Analogue and digital are paradigms for recording information, specifically information about an object or state that obtains in the world.
![](/img/analog-digital.svg)
![](/_img/analog-digital.svg)
## Analogue

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@ -24,7 +24,7 @@ Cells and batteries can be connected to each other in electrical ciruits to incr
The table below summarises the relative differences:
![](/img/cell-comparison.svg)
![](/_img/cell-comparison.svg)
### Series connections
@ -43,11 +43,11 @@ Thus series connections increase voltage but keep current constant.
_Series battery connection:_
![](/img/series-battery-diagram.svg)
![](/_img/series-battery-diagram.svg)
_Can be represented in a circuit diagram in one of the following two ways: as a series of cells or as a single battery:_
![](/img/series-battcircuit.svg)
![](/_img/series-battcircuit.svg)
In the case of **series opposing**, negative terminals are connected to each other and positive terminals are connected to each other in a series. This doesn't have many applications.
@ -67,11 +67,11 @@ $$
_Parallel battery connection:_
![](/img/parallel-battery-diagram.svg)
![](/_img/parallel-battery-diagram.svg)
_Parallel battery circuit diagram:_
![](/img/circ-batt-final.svg)
![](/_img/circ-batt-final.svg)
### Series-parrallel

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@ -10,7 +10,7 @@ An electrical circuit is a set of electrical components connected in such a way
Below is a basic circuit representing a 9-volt [battery](/Electronics_and_Hardware/Analogue_circuits/Cells_and_batteries.md#cells-and-batteries) with a 10,000$\Omega$ [resistor](/Electronics_and_Hardware/Analogue_circuits/Resistance.md) attached accross its terminals. Through the application of [Ohm's Law](/Electronics_and_Hardware/Physics_of_electricity/Ohms_Law.md) we can determine that the maximum current will be 0.9 miliamps.
![](/img/basic-circuit.png)
![](/_img/basic-circuit.png)
## Open and short circuits
@ -24,4 +24,4 @@ Sometimes circuits can be represented in a vertical manner rather than in an act
The circuit below is functionally identical to the previous circuit but represented vertically:
![](/img/vertical-circuit.png)
![](/_img/vertical-circuit.png)

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@ -22,7 +22,7 @@ When the terminals are connected to each other via a conductor (e.g. copper wire
_The diagram below illustrates the flow of current where the circles are electrons knocking into each other and passing current:_
![](/img/charge-cylinder.svg)
![](/_img/charge-cylinder.svg)
> Electrons travel very slowly through a conductor. This is in contrast to their intrinsic motion which of course equal to the speed of light (186, 000 miles per second).

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@ -17,4 +17,4 @@ In circuit diagrams with simple DC current, ground is taken to be the negative t
The symbol for ground in circuit diagrams:
<img src="/home/thomas/repos/computer_science/img/ground-symbol.png" width="300px">
<img src="/home/thomas/repos/computer_science/_img/ground-symbol.png" width="300px">

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@ -8,10 +8,10 @@ tags: [electricity, electrical-circuits]
LED' stands for **Light Emitting Diode**, a [circuit]() component that emits light. The symbol for an LED is displayed below:
![](/img/diode-led.png)
![](/_img/diode-led.png)
A **diode** is a special kind of component that only permits current to flow through it in one direction. To achieve this it has very low resistance in one direction to allow current flow and high resistance in the other direction to impede current flow. This feature of diodes is clearly represented in the generic diode circuit symbol:
![](/img/diode.png)
![](/_img/diode.png)
An LED diode lights up when the right amount of current flows through it. A standard LED has a maximum current of 20mA. An appropriate [resistor](/Electronics_and_Hardware/Analogue_circuits/Resistance.md#resistors) must therefore be added to the circuit to ensure the current doesn't exeedd this amount.

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@ -60,7 +60,7 @@ The relationship between voltage rise and voltage drop is expressed in Kirchoff'
The application of the Law is illustrated in the following diagram:
![](/img/voltage-drop.png)
![](/_img/voltage-drop.png)
The explanation for the voltage drop at the positions $V^{A}$ and $V^{D}$ are obvious enough: they are at the beginning and end of the loop so are equal to the maximal voltage rise and minimal voltage drop, respectively.

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@ -33,7 +33,7 @@ Let's break down each column from the right:
### More examples to practise with
![](../img/../../img/Pasted_image_20220319174839.png)
![](../_img/../../_img/Pasted_image_20220319174839.png)
## Binary multiplication
@ -64,10 +64,10 @@ When we multiply binary numbers in columns we multiply each of the top numbers b
An important difference is that when we move along the bottom row from the $2^0$, to $2^2$, to $2^4$ etc we must put a zero in the preceding column as a place holder. The sequence is shown below:
![](/img/multiplication_01.gif)
![](/_img/multiplication_01.gif)
![](/img/multiplication_02.gif)
![](/_img/multiplication_02.gif)
![](/img/multiplication_03.gif)
![](/_img/multiplication_03.gif)
![](/img/multiplication_04.gif)
![](/_img/multiplication_04.gif)

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@ -16,7 +16,7 @@ We can start with a limited palette: greyscale. Here there is black and white an
In decimal, 0 is equal to black (zero light intensity) and 255 is equal to white (full light intensity). Some examples of this (including binary and hex representations are below):
![](/img/greyscale-encoding.svg)
![](/_img/greyscale-encoding.svg)
### Colour encoding
@ -28,12 +28,12 @@ Some examples below
Red is represented in RGB with all 8 red bits to set to 1 and the remaining 16 bits for the other two colours set to 0.
![](/img/red-encoding.svg)
![](/_img/red-encoding.svg)
#### Yellow
Yellow is represented in RGB with both red and blue set to 1 and the remaining 8 green bits set to ):
![](/img/yellow-encoding.svg)
![](/_img/yellow-encoding.svg)
## Binary encoding of images

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@ -87,11 +87,11 @@ If we have before us the binary place values ($1, 2, 4, 8$). We know that 6 is e
More clearly:
![](../../img/Pasted_image_20220319135558.png)
![](../../_img/Pasted_image_20220319135558.png)
And for comparison:
![](../../img/Pasted_image_20220319135805.png)
![](../../_img/Pasted_image_20220319135805.png)
Or we can express the binary as:
@ -105,4 +105,4 @@ $$ 2^1 + 2^2 $$
Let's convert 23 into binary:
![](../../img/Pasted_image_20220319135823.png)
![](../../_img/Pasted_image_20220319135823.png)

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@ -103,6 +103,6 @@ $$
= 15
$$
![](/img/hexadecimal-to-bytes.svg)
![](/_img/hexadecimal-to-bytes.svg)
> Every four bits (or half byte) in binary corresponds to one symbol in hexadecimal. Therefore **a byte can be easily represented with two hexadecimal symbols, a 16-bit number can be represented with four hex symbols, a 32-bit number can represented with eight hex symbols and so on.**

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@ -19,11 +19,11 @@ For example the two's complement of $0101$ (binary 5) is $1011$. There is a simp
1. Take the unsigned number, and flip the bits. In other words: invert the values, so $0$ becomes $1$ and $1$ becomes $0$.
2. Add one
![](/img/unsigned-to-signed.png)
![](/_img/unsigned-to-signed.png)
To translate a signed number to an unsigned number you flip them back and still add one:
![](/img/signed-to-unsigned.png)
![](/_img/signed-to-unsigned.png)
### Advantages
@ -66,7 +66,7 @@ Thus for a 4-bit number:
Then if we add the decimal equivalents of the place value together, we get our signed number. So in the case of $-3$:
![](/img/signed-conversion.png)
![](/_img/signed-conversion.png)
## Considerations

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@ -13,13 +13,13 @@ tags: [binary, bits]
The reason is straight forward: it is the simplest way on the level of pure engineering of representing numerical and logical values; both of which are the basic foundations of programming. An electronic circuit or transistor only needs to represent two states: on (1) and off (0) which corresponds to the switch on an electrical circuit.
A single circuit representing the binary values of 1 and 0:
![multi_on_off 1.gif](../../img/multi_on_off.gif)
![multi_on_off 1.gif](../../_img/multi_on_off.gif)
It would be much more complicated to have to represent ten different states under the decimal number system, although denary computers do exist.
If we want more digits, we just need to add in more circuits, and we can represent as large a binary number as we need. We just need one switch for every digit we want to represent. The switches used in modern computers are so cheap and so small that billions can be fitted on a single circuit board.
![multiple_circuits.gif](../../img/multiple_circuits.gif)
![multiple_circuits.gif](../../_img/multiple_circuits.gif)
When we use the term 'switch' we actually mean the transistor components of a circuit. We don't need to know the physical details at this level but we can say that a transistor turns a current on and off. They can also be used to amplify the current.

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@ -20,7 +20,7 @@ A single iteration of the volatage rising and falling is a **pulse**. A complete
The diagram below shows a pulse cycle of 2Hz.
![](/img/clock_pulses.png)
![](/_img/clock_pulses.png)
## Linking components to the clock

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@ -11,7 +11,7 @@ tags: [logic-gates, binary, memory]
The [logic circuit](/Electronics_and_Hardware/Digital_circuits/Digital_circuits.md) below demonstrates how memory can be created using [NAND](/Electronics_and_Hardware/Digital_circuits/Logic_gates.md#nand-gate) gates. A single bit is stored in memory.
![](/img/nand_latch_logic_circuit.png)
![](/_img/nand_latch_logic_circuit.png)
Interactive version of circuit:
<iframe src="https://circuitverse.org/simulator/embed/nand-mem?theme=default&display_title=false&clock_time=true&fullscreen=true&zoom_in_out=true" style="border-width:; border-style: solid; border-color:;" name="myiframe" id="projectPreview" scrolling="no" frameborder="1" marginheight="0px" marginwidth="0px" height="500" width="500" allowFullScreen></iframe>
@ -35,7 +35,7 @@ Interactive version of circuit:
> Upshot: With **S** `ON`, output is the same as input
![](/img/nand-mem-first.gif)
![](/_img/nand-mem-first.gif)
### Second state: both S and I `ON`
@ -48,7 +48,7 @@ Interactive version of circuit:
> Upshot: With **S** on, the output is again the same as the input
![](/img/nand-mem-second.gif)
![](/_img/nand-mem-second.gif)
> So far we have seen that when **S** is `ON` you can change **I** on and off and **O** will change with it.
@ -60,4 +60,4 @@ The specific reason for this is that, if **S** is `OFF`, both **A** and **B** ar
This is illustrated in the diagram below. The space occupied by **A** and **B** remains on (note it is illuminated) regardless of the state of **I**.
![](/img/nand-mem-demonstrated.gif)
![](/_img/nand-mem-demonstrated.gif)

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@ -28,7 +28,7 @@ The possible state changes for the JK Flip-Flop are detailed below:
A JK Flip-Flop can execute on either the positive or negative pulse. Below are the diagrams for a rising and falling pulse respectively:
![](/img/jk-flip-flops.png)
![](/_img/jk-flip-flops.png)
@ -43,7 +43,7 @@ Thus the state table for the T Flip-Flop is:
| 0 | Pulse | Maintain previous value | Hold |
| 0 | Pulse | Inverse of previous value | Toggle |
![](/img/t-flip-flops.png)
![](/_img/t-flip-flops.png)
<iframe src="https://withdiode.com/embed/4f015341-dc37-49e6-912a-42a580a1c92e" style="width:100%; height:500px; border:1px solid rgba(0,0,0,0.1); border-radius: 0.5rem; overflow:hidden;" title="LED & Switch" allow="accelerometer; ambient-light-sensor; camera; encrypted-media; geolocation; gyroscope; hid; microphone; midi; payment; usb; vr; xr-spatial-tracking" sandbox="allow-forms allow-modals allow-popups allow-presentation allow-same-origin allow-scripts" ></iframe>

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@ -22,7 +22,7 @@ We will achieve this by using three full adders and one half adder, moving from
Let's walk through the process:
![](/img/four-bit-adder.png)
![](/_img/four-bit-adder.png)
1. HA receives the bits $0$ and $1$ as inputs. It outputs $1$ as the sum bit and $0$ as the carry-out.
2. FA1 receives $0$ as the carry-in bit plus $1$ and $1$ as its input. This means it has the following calculation to execute: $1 + 1 + 0$. This gives $0$ as the sum bit and $1$ as the carry-out bit.

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@ -50,7 +50,7 @@ The half adder receives two bits (A and B) which are to be added together. It ou
The diagram below shows the circuit representation of a half-adder and an example calculation. This calculation matches the ones column of the earlier binary addition example: $0011 + 0010$.
![](/img/half-adder-new.png)
![](/_img/half-adder-new.png)
### Implementation with logic gates
@ -88,7 +88,7 @@ And the carry-out bit replicates the truth conditions of [AND](/Electronics_and_
It is therefore possible to implement a half-adder with just these two logic gates:
![](/img/half-adder-gates-three.png)
![](/_img/half-adder-gates-three.png)
The digital circuit above has the same inputs and outputs as the half adder diagram above.
@ -104,7 +104,7 @@ The full adder takes in three inputs and has two outputs. It is identical to the
| ---------------------------- | ----------------------------- | ------------------------ | ---------------------- | ---------------------------- |
| The first number to be added | The second number to be added | The incoming carried bit | The sum bit (A+B+C_in) | The carry-out bit (A+B+C_in) |
![](/img/full-adder-new.png)
![](/_img/full-adder-new.png)
The diagram above is equivalent to the calculation taking place in the fours column. It has received a carry from the twos column ($1 + 1$ results in $1$ as a carry) and then adds this together with its own inputs ($0$ and $0$).

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@ -16,7 +16,7 @@ The type we will look at are called **dual in-line packages** (DIPs). They are r
_An integrated circuit and its use on a breadboard:_
<img align="left" width="200" src="/home/thomas/repos/computer_science/img/integrated-circuit.jpeg">
<img width="200" src="/home/thomas/repos/computer_science/img/breadboard-DIP.jpg">
<img align="left" width="200" src="/home/thomas/repos/computer_science/_img/integrated-circuit.jpeg">
<img width="200" src="/home/thomas/repos/computer_science/_img/breadboard-DIP.jpg">
// TODO: Add diagrams of different IC gate types

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@ -40,7 +40,7 @@ The most succinct account of a latch:
_The representation of an SR Latch in a digital circuit diagram_:
![](/img/sr_latch_diagram.png)
![](/_img/sr_latch_diagram.png)
## Creating a latch circuit
@ -50,7 +50,7 @@ The two gates are in a **cross-coupled configuration**. This basically means tha
The circuit is created as follows:
![](/img/sr_latch_logic_circuit.png)
![](/_img/sr_latch_logic_circuit.png)
Interactive version:

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@ -42,7 +42,7 @@ Whereas this diagram presents the implementation of the gate: it shows the speci
### Symbol
![](/img/not-gate-new.png)
![](/_img/not-gate-new.png)
### Truth conditions
@ -61,7 +61,7 @@ Whereas this diagram presents the implementation of the gate: it shows the speci
### Symbol
![](/img/and-gate-new-2.png)
![](/_img/and-gate-new-2.png)
### Truth conditions
@ -82,7 +82,7 @@ Whereas this diagram presents the implementation of the gate: it shows the speci
### Symbol
![](/img/nand-gate-new.png)
![](/_img/nand-gate-new.png)
### Truth conditions
@ -105,7 +105,7 @@ NAND is a **universal logic gate**: equipped with just a NAND we can represent e
### Symbol
![](/img/or-gate-new.png)
![](/_img/or-gate-new.png)
### Truth conditions
@ -126,7 +126,7 @@ NAND is a **universal logic gate**: equipped with just a NAND we can represent e
### Symbol
![](/img/xor-gate-new.png)
![](/_img/xor-gate-new.png)
### Truth conditions
@ -147,7 +147,7 @@ NAND is a **universal logic gate**: equipped with just a NAND we can represent e
### Symbol
![](/img/nor-gate-new.png)
![](/_img/nor-gate-new.png)
### Truth conditions

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@ -44,7 +44,7 @@ If we look at the pattern of each flip-flops' output we notice the following:
This means that to construct a circuit that displays this behaviour we just have to use a [T flip-flop](/Electronics_and_Hardware/Digital_circuits/Flip_flops.md#t-flip-flops) since the only state change we need is a single bit toggle three times that retains its value.
Using these pulse patterns we can construct a circuit as follows:
![](/img/3-bit-adder-diagram.png)
![](/_img/3-bit-adder-diagram.png)
<iframe src="https://circuitverse.org/simulator/embed/3-bit-counter-d33846e3-7538-427d-b4cc-dc64fdaf0af3?theme=default&display_title=false&clock_time=true&fullscreen=true&zoom_in_out=true" style="border-width:; border-style: solid; border-color:;" name="myiframe" id="projectPreview" scrolling="no" frameborder="1" marginheight="0px" marginwidth="0px" height="500" width="600" allowFullScreen></iframe>

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@ -16,11 +16,11 @@ An electrical switch is inherently binary. When the switch is on, it acts like a
We can combine switches in a circuit to create analogs to logic gates.
![](/img/switch-and-gate.png)
![](/_img/switch-and-gate.png)
In the example above a simple AND gate is implemented with switches. Each switch is a conjunct and the current only flows if both switches are on, closing the circuit.
![](/img/switch-or-gate.png)
![](/_img/switch-or-gate.png)
In the example above is a circuit implementing an OR gate. The current flows just if one of the switches are on or if both of the switches are on but not if both switches are off.
@ -32,15 +32,15 @@ Thus instead of switches, modern digital circuits use transistors, a special ele
There are different types of transistors but the simplest for the purposes of explanation are **bipolar junction transistors**.
![](/img/transistor-diag.svg)
![](/_img/transistor-diag.svg)
A transistor works as follows: applying a small amount of current at the base allows a larger current to flow from the collector to the emitter. Relating this back to switches, applying current to the base is like turning the switch on. Removing this current is like turning the switch off.
The diagrams below show a transistor being used in a circuit to create 'on' and 'off' switch states alongside a switch based circuit.
![](/img/transistor-off.png)
![](/_img/transistor-off.png)
![](/img/transistor-on.png)
![](/_img/transistor-on.png)
- $V^{in}$ is the voltage that electrically controls the switch-as-transistor
- $V^{out}$ is the voltage we want to control: it will be high when the transistor is in the 'on' state and low otherwise
@ -60,8 +60,8 @@ With the basic element of the transistor established, we can combine transistors
For example to create an [AND](/Electronics_and_Hardware/Digital_circuits/Logic_gates.md#and-gate) gate we would have two voltage inputs going into two transistors that are connected in sequence. The two transistors create a continuous line going from the collector of one to the emitter of the other. If either voltage input is low then the voltage of the combined line is low (equivalent to the circuit being broken) and there is no current flowing.
![](/img/and-transistor.png)
![](/_img/and-transistor.png)
Below, an [OR](/Electronics_and_Hardware/Digital_circuits/Logic_gates.md#or-gate) has been constructed with transistors. If a voltage is applied to the base of either transistor, the current reaches the V-out terminal.
![](/img/or-transistor.svg)
![](/_img/or-transistor.svg)

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@ -7,7 +7,7 @@ tags: [motherboard]
# Motherboard
<img src="../img/motherboard-pi.jpg" width="400px"/>
<img src="../_img/motherboard-pi.jpg" width="400px"/>
The motherboard is the foundation of a computer. It allocates power and allows communication to and between the [CPU](/Computer_Architecture/CPU/Von_Neumann_architecture.md), [RAM](/Computer_Architecture/Memory/Memory.md), [harddisk](/Operating_Systems/Disks/What_are_disks.md) and all other hardware components.

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@ -32,7 +32,7 @@ Magnetism, understood as the effect of a magnetic field, arises from the propert
As they spin they produce a **magnetic dipole**: the two poles noted above. We call this propensity of electrons the **intrinsic magnetic moment** of the electron. It is aggregates of these miniature magnetic behaviours that produce the overall magnetic property of the material.
![](/img/dipole-again.svg)
![](/_img/dipole-again.svg)
In most materials, equal numbers of electrons spin in opposite directions. As a result, their magentic effects are cancelled out. However **in strongly magnetic materials an overall majority of electrons spin in one particular direction**. This breaks the equilibrium and produces the magnetic field.
@ -72,7 +72,7 @@ The magnetic field and force is more complex than the electric field/force. Wher
This is illustrated below which shows the magnetic field operating at right angles to the flow of charge within a wire.
<img src="/home/thomas/repos/computer_science/img/magnetic_field.png" width="300" />
<img src="/home/thomas/repos/computer_science/_img/magnetic_field.png" width="300" />
## The electromagnetic field
@ -101,7 +101,7 @@ Maxwell's Equations describe how electromagnetic fields are generated and behave
Electromagnetic waves consist of rapidly changing electric and magnetic fields. They are emitted any time an electrically charged particle accelerates. These waves are generally referred to as light. However, more accurately, 'light' refers to the types of electromagnetic wave that we can see. Electromagnetic waves form a spectrum based on their frequency and wavelength. For example, 'radio waves' are low-frequency / long wavelength electromagnetic waves and gamma rays are high-frequency / short wavelength waves:
![](/img/em-spectrum.jpg)
![](/_img/em-spectrum.jpg)
The image below shows the propagation of an electromagnetic wave through space. We can identify the core components as follows
@ -109,7 +109,7 @@ The image below shows the propagation of an electromagnetic wave through space.
- The magenetic field is perpendicular to the vector of the electric field $E$ which propagates upward along the $y$ axis
- The directionality of both waves is forward along the $x$ axis
![](/img/em-wave.gif)
![](/_img/em-wave.gif)
## Using magnetism to generate electricity

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@ -14,7 +14,7 @@ Each shell can accomodate a maximum number of electrons. The shells are designat
_The diagram below demonstrates shell naming conventions and the maximum number of electrons per shell._
![](/img/valence-shell.svg)
![](/_img/valence-shell.svg)
## Valence

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@ -22,7 +22,7 @@ tags: [physics]
## Atomic particles
<img src="/home/thomas/repos/computer_science/img/atom-diagram.svg" width="400" align="right" />
<img src="/home/thomas/repos/computer_science/_img/atom-diagram.svg" width="400" align="right" />
* There are three particles comprising atoms: **protons**, **neutrons** and **electrons**.

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@ -16,7 +16,7 @@ We can use [ps](/Programming_Languages/Shell_Scripting/Processes.md) to list the
_Here I have pressed `u` to show only the processes associated with my user:_
![](/img/htop.png)
![](/_img/htop.png)
### Main commands
@ -96,7 +96,7 @@ procs -----------memory---------- ---swap-- -----io---- -system-- ------cpu-----
`lsof` stands for _list open files_. It lists opened files and the processes using them. Without modifiers it outputs a huge amount of data. The best way to use it is to execute it against a specific PID. For example the below output gives me some useful info about which files VS Code is using:
![](/img/lsof.png)
![](/_img/lsof.png)
## System calls: `strace`

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@ -8,7 +8,7 @@ tags: [journaling, systemd, systems-programming]
`journald` is a program that comes as default with [systemd](/Linux/systemd.md). It is a service fror collecting and storing system-level log data. I keeps a track of all [kernel](/Operating_Systems/The_Kernel.md) processes. It is invaluable when tracing the source of problems and errors that may arise on the system level. It keeps a track of all kernal processes.
![](/img/journald.png)
![](/_img/journald.png)
## `journalctl`

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@ -51,13 +51,13 @@ Units are managed via `systemd` configuration files.
System level `systemd` config files are located in the _system unit directory_ at `/usr/lib/systemd/system`. You shouldn't change or manipulate these files or attempt to add new config files here since they will be overwritten by the system.
![](/img/systemd-global-files.png)
![](/_img/systemd-global-files.png)
_`systemd` global unit files_
Local definitions that relate to the specific user and where the user herself can define units are located in the _system configuration_ directory: `/etc/systemd/system`.
![](/img/systemd-local-files.png)
![](/_img/systemd-local-files.png)
_`systemd` local unit files, specific to the currently logged-in user_

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@ -57,7 +57,7 @@ In other terms, if you can derive a contradiction from the set, the set is logic
A [contradiction](/Logic/General_concepts/Logical_truth_and_falsity.md#logical-falsity) has very important consequences for reasoning because if a set of propositions is inconsistent, any other proposition is derivable from it.
![](/img/derivation_from_contradiction.png)
![](/_img/derivation_from_contradiction.png)
_A demonstration of the the consequences of deriving a contradiction in a sequence of reasoning._

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@ -35,4 +35,4 @@ $$
Note that the property of equivalence stated in terms of derivablity above is identical to the derivation rule for the [material biconditional](/Logic/Proofs/Biconditional_Introduction.md):
![bi-intro.png](/img/bi-intro.png)
![bi-intro.png](/_img/bi-intro.png)

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@ -8,7 +8,7 @@ We know that when we construct a [derivation](/Logic/Proofs/Formal_proofs_in_pro
_Demonstration_
![](/img/proofs-drawio-Page-5.drawio_2.png)
![](/_img/proofs-drawio-Page-5.drawio_2.png)
We see in this example that there is no starting set and thus no primary assumptions. Instead we start with nothing other than the proposition we wish to derive. The proposition is effectively derived from itself. In these scenarios we say that we are constructing a derivation from an **empty set**.

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@ -8,4 +8,4 @@ tags: [derivation-rules]
Give that the biconditional means that if $P$ is the case, $Q$ must be the case and if $Q$ is the case, $P$ must be the case, if we have $P \leftrightarrow Q$ and $P$, we can derive $Q$ and vice versa.
![](/img/biconditional-elim.png)
![](/_img/biconditional-elim.png)

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@ -8,4 +8,4 @@ tags: [derivation-rules]
The biconditional means if $P$ is the case, $Q$ must be the case and if $Q$ is the case, $P$ must be the case. Thus to introduce this operator we must demonstrate both that $Q$ follows from $P$ and that $P$ follows from $Q$. We do this via two sub-proofs.
![](/img/bi-intro.png)
![](/_img/bi-intro.png)

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@ -8,4 +8,4 @@ tags: [derivation-rules]
If we have a conditional and we have independently derived its antecedent, we may invoke its consequent. This is often referred to as _Modus ponens_ (affirming the antecedent).
![](/img/cond-elim.png)
![](/_img/cond-elim.png)

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@ -8,4 +8,4 @@ tags: [derivation-rules]
If we can show that $Q$ follows from $P$ (typically via a sub-proof) than we can assert that P implies Q. This is also sometimes known as _Conditional Proof_
![](/img/cond-intro.png)
![](/_img/cond-intro.png)

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@ -8,4 +8,4 @@ tags: [derivation-rules]
If a conjunction exists, it means that both conjuncts are the case; therefore we can legitimately extract either one of them. Also known as _Simplification_.
![](/img/conjunc-elim.png)
![](/_img/conjunc-elim.png)

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@ -6,4 +6,4 @@ tags: [derivation-rules]
If two conjuncts have each been independently derived then they can be conjoined. Also known more simply as _Conjunction_
![](/img/conjunc-intro.png)
![](/_img/conjunc-intro.png)

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@ -8,13 +8,13 @@ tags: [derivation-rules]
This rule is sometimes also referred to as _Constructive Dilemma_. This can be a bit tricky to understand because the goal is to derive or _introduce_ a new proposition separate from the disjunction you start out with. This may be disjunction, a single proposition or a proposition containing any other logical connective. You do this by constructing two sub-proofs, one for each of the disjuncts comprising the disjunction you start out with. If you can derive your target proposition as the conclusion of each subproof then you may invoke the conclusion in the main proof and take it to be derived.
![](/img/disjunc-elim.png)
![](/_img/disjunc-elim.png)
_Here is an example where Disjunction Elimination is used to derive a new disjunction._
![](/img/proofs-drawio-Page-6.drawio.png)
![](/_img/proofs-drawio-Page-6.drawio.png)
_Here are two further examples that use Disjunction Elimination to derive singular propositions_
![](/img/ORelim1.png)
![](/img/ORelim2.png)
![](/_img/ORelim1.png)
![](/_img/ORelim2.png)

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@ -9,4 +9,4 @@ tags: [derivation-rules]
This rule can seem a little odd: like we are randomly introducing an additional proposition without giving any justification. However this is just a consequence of the fact if $P$ is true, so is $P \lor Q$ since disjunction is not the same as conjunction: only one disjunct needs to be true for the compound disjunction to be true. This is represented in the context of [truth-trees](Truth-trees.md#disjunction-decomposition) by the fact that truth can pass up via either branch of a disjunction pattern.
This rule is sometimes also referred to (confusingly) as _Addition_.
![](/img/disjunc-intro.png)
![](/_img/disjunc-intro.png)

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@ -35,11 +35,11 @@ This is known as _Fitch notation_
_Schematically_:
![](/img/proofs-drawio-Page-5.drawio.png)
![](/_img/proofs-drawio-Page-5.drawio.png)
_Applied example_:
![](/img/proofs-drawio-Page-6.drawio.png)
![](/_img/proofs-drawio-Page-6.drawio.png)
## Sub-proofs

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@ -8,4 +8,4 @@ tags: [derivation-rules]
Like the [introduction](/Logic/Proofs/Negation_Introduction.md) rule for negation, the elimination rule also works by deriving a contradiction. It is basically _Negation Introduction_ in reverse. Instead of starting the sub-proof with a true proposition from which you derive a contradiction, you start with the negation of a proposition, derive a contradiction and then assert the positive of the negated proposition you started out with.
![](/img/negate-elim.png)
![](/_img/negate-elim.png)

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@ -8,4 +8,4 @@ tags: [derivation-rules]
This is also known as _proof by contradiction_. You start with an assumption declared in a sub-proof. If you can derive a contradiction from this assumption (typically from the introduction of another proposition and its negation), then you are permitted to derive the negation of the auxiliary assumption in the main proof.
![](/img/negate-intro.png)
![](/_img/negate-intro.png)

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@ -8,4 +8,4 @@ tags: [derivation-rules]
**Reiteration (R)** allows us to restate any proposition already in the proof within the main proof or a more deeply nested sub-proof. Reiteration allows us to reuse any assumptions, or propositions derived from assumptions, without having to introduce a new dependency with another assumption.
![](/img/reiteration.png)
![](/_img/reiteration.png)

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@ -31,20 +31,20 @@ Let's start with $D$: where does it occur in the assumptions? It occurs in the c
So far we have:
![](/img/step1.png)
![](/_img/step1.png)
Now we just need to get $D$ from the proposition at line 3. This is easy since we already have access to the consequent of the biconditional at line 1. Therefore we can apply [Biconditional Elimination](/Logic/Proofs/Biconditional_Elimination.md)) at line 3 to get $D$. We are now halfway there:
![](/img/step2.png)
![](/_img/step2.png)
Next we need to turn our attention to deriving $L \lor A$. How can we obtain $L$ ? Well it is contained within the first conjunct of the assumption on line 2. Again, we can get this through the application of [Conjunction Elimination](/Logic/Proofs/Conjunction_Elimination.md).
Now, how do we get $L$ from $(\lnot N \rightarrow L)$? Well, we already have the antecedent $\lnot N$ as an assumption on the first line, so we can use [Conditional Elimination](/Logic/Proofs/Conditional_Elimination.md) to derive $L$. These two steps give us:
![](/img/step3.png)
![](/_img/step3.png)
Now we need to get from $L$ to $L \lor A$. This is really straightforward because by using [Disjunction Introduction](/Logic/Proofs/Disjunction_Introduction.md)) we can get from any sentence to a disjunction. Finally, having assembled all the constituent parts of the conjunction that is the conclusion, we can combine them with [Conjunction Introduction](/Logic/Proofs/Conjunction_Introduction.md) as we had planned at the outset.
![](/img/step4.png)
![](/_img/step4.png)
### A further example
@ -58,7 +58,7 @@ The requirements here could easily mislead us. We see that the target propositio
Actually, if we look more closely, there is a better approach. The target proposition is contained in the first premise as the consequent to the biconditional ($\lnot L \leftrightarrow [X \land (\lnot S \lor B)]$). A better approach is therefore to seek to derive the antecedent ($\lnot L$) and then use [Biconditional Elimination](/Logic/Proofs/Biconditional_Elimination.md) to extract the target sentence which is the consequent.
![proof.png](/img/proof.png)
![proof.png](/_img/proof.png)
## Proving theorems
@ -70,13 +70,13 @@ _Prove:_ $\vdash (U \land Y) \rightarrow [L \rightarrow (U \land L)]$
Our strategy here is to identify the main connective in the proposition we want to derive (the material conditional). We then assume the antecedent and attempt to derive the consequent from it.
![](/img/theoremproof.png)
![](/_img/theoremproof.png)
## A complex theorem proof
_Prove_ $\vdash (\lnot A \lor \lnot B) \leftrightarrow \lnot(A \land B)$
![](/img/dsfdsfsdfwe.png)
![](/_img/dsfdsfsdfwe.png)
### Walkthrough

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@ -64,7 +64,7 @@ Using the definitions above, we can now define truth-functional consistency and
The following is a truth tree for the set ${P \lor Q, \sim P }$:
![basic-open-tree 1.svg](../img/basic-open-tree%201.svg)
![basic-open-tree 1.svg](../_img/basic-open-tree%201.svg)
### Interpretation
@ -90,7 +90,7 @@ Invoking the truth-table highlights the differences between the two techniques.
The following is a truth tree for the set ${A & \sim B, C, \sim A \lor \sim B }$.
![basic-closed-tree 1.svg](../img/basic-closed-tree%201.svg)
![basic-closed-tree 1.svg](../_img/basic-closed-tree%201.svg)
### Interpretation
@ -119,37 +119,37 @@ So far we have encountered the decomposition rules for conjunction (`&D`) and di
### Negated negation decomposition: `~~D`
![negated-negation-decomposition-rule 2.svg](../img/negated-negation-decomposition-rule%202.svg)
![negated-negation-decomposition-rule 2.svg](../_img/negated-negation-decomposition-rule%202.svg)
Truth passes only if $P$ is true
### Conjunction decomposition: `&D`
![conjunction-decomposition-rule.svg](../img/conjunction-decomposition-rule.svg)
![conjunction-decomposition-rule.svg](../_img/conjunction-decomposition-rule.svg)
Truth passes only $P$ and $Q$ are both true.
### Negated Conjunction decomposition: `~&D`
![negated-conjunction-decomposition-rule.svg](../img/negated-conjunction-decomposition-rule.svg)
![negated-conjunction-decomposition-rule.svg](../_img/negated-conjunction-decomposition-rule.svg)
Truth passes if either $\sim P$ or $\sim Q$ is true. This rule is a consequence of the equivalence between $\sim (P & Q)$ and $\sim P \lor \sim Q$ , the first of DeMorgans Laws.
### Disjunction decomposition: `vD`
![disjunction-decomposition-rule.svg](../img/disjunction-decomposition-rule.svg)
![disjunction-decomposition-rule.svg](../_img/disjunction-decomposition-rule.svg)
Truth passes if either $P$or $Q$ are true.
### Negated Disjunction decomposition: `~vD`
![negated-disjunction-decomposition-rule.svg](../img/negated-disjunction-decomposition-rule.svg)
![negated-disjunction-decomposition-rule.svg](../_img/negated-disjunction-decomposition-rule.svg)
Truth passes if both $P$ and $Q$ are false. This rule is a consequence of the equivalence between $\sim (P \lor Q)$ and $\sim P & \sim Q$, the second of DeMorgans Laws.
### Conditional decomposition: `⊃D`
![conditional-decomposition-rule.svg](../img/conditional-decomposition-rule.svg)
![conditional-decomposition-rule.svg](../_img/conditional-decomposition-rule.svg)
Truth passes if either $\sim P$ or $Q$ are true. This rule is a consequence of the equivalence between $P \supset Q$ and $\sim P \lor Q$ therefore this branch has the shape of a disjunction with $\sim P$ , $Q$ as its disjuncts.
@ -157,17 +157,17 @@ Truth passes if either $\sim P$ or $Q$ are true. This rule is a consequence of t
Truth passes if both $P$ and $\sim Q$ are true. This is a consequence of the equivalence between $\sim (P \supset Q)$ and $P & \sim Q$.
![negated-conditional-decomposition-rule.svg](../img/negated-conditional-decomposition-rule.svg)
![negated-conditional-decomposition-rule.svg](../_img/negated-conditional-decomposition-rule.svg)
### Biconditional decomposition: `≡D`
![biconditional-decomposition-rule.drawio(1).svg](../img/biconditional-decomposition-rule.drawio%281%29.svg)
![biconditional-decomposition-rule.drawio(1).svg](../_img/biconditional-decomposition-rule.drawio%281%29.svg)
Truth passes if either $P$ and $Q$ are true or $\sim P & \sim Q$ are true. This is an interesting rule because it combines the disjunction and conjunction tree shapes.
### Negated biconditional decomposition: `~≡D`
![negated-biconditional-decomposition-rule.drawio.svg](../img/negated-biconditional-decomposition-rule.drawio.svg)
![negated-biconditional-decomposition-rule.drawio.svg](../_img/negated-biconditional-decomposition-rule.drawio.svg)
Truth passes if either $P$ and $\sim Q$ is true or if $\sim P$ and $Q$ is true.
@ -181,7 +181,7 @@ With truth-trees regardless of which order you decompose the set members, the co
Here are some examples of these rules applied:
![complex-tree.svg](../img/complex-tree.svg)
![complex-tree.svg](../_img/complex-tree.svg)
Observe that here we dont bother to decompose the sentence on line 1. This is because, having decomposed the sentences on lines 2 and 3 we have arrived at a closed tree. It is therefore unnecessary to go any further for if two sentences in the set are inconsistent with each other, adding another sentence is not going to change the overall assignment of inconsistency.
@ -199,7 +199,7 @@ When we wish to assess [logical falsity](Logical%20truth%20and%20falsity.md#logi
A logically false sentence cannot be true on any assignment. This is the same thing as an inconsistent set. Thus it will be represented in a truth tree as inconsistency which is disclosed via a closed tree.
![logical-falsity-tree.svg](../img/logical-falsity-tree.svg)
![logical-falsity-tree.svg](../_img/logical-falsity-tree.svg)
### Logical truth
@ -221,7 +221,7 @@ Recall that $P$ and $Q$ are [logically equivalent](Logical%20equivalence.md) jus
> Sentences $P$ and $Q$ are truth-functionally equivalent if and only if the set $\sim (P \equiv Q)$ has a closed tree
![logical-equivalence-tree.svg](../img/logical-equivalence-tree.svg)
![logical-equivalence-tree.svg](../_img/logical-equivalence-tree.svg)
### Logical entailment and validity

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@ -11,15 +11,15 @@ tags:
Suppose you have the following shape:
![draw.io-Page-9.drawio 1.png](../../img/draw.io-Page-9.drawio.png)
![draw.io-Page-9.drawio 1.png](../../_img/draw.io-Page-9.drawio.png)
One part is shaded. This represents one-eighth of the original shape.
![one-eighth-a.png](../../img/one-eighth-a.png)
![one-eighth-a.png](../../_img/one-eighth-a.png)
Now imagine there are four instances of the shape and one-eighth remains shaded. How man one-eighths are there in four?
![draw.io-Page-9.drawio 2.png](../../img/draw.io-Page-9.drawio.png)
![draw.io-Page-9.drawio 2.png](../../_img/draw.io-Page-9.drawio.png)
The shaded proportion represents $\frac{1}{8}$ of the shape. Imagine four of these shapes, how many eighths are there?

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@ -9,7 +9,7 @@ tags:
Two fractions are equivalent if they represent the same value.
To begin with we can represent this visually:
![equiv-fractions.png](../../img/equiv-fractions.png)
![equiv-fractions.png](../../_img/equiv-fractions.png)
_Each shaded area is taking up the same proportion of the whole._

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@ -16,10 +16,10 @@ Prime factorisation is the activity of expressing a composite number as the uniq
> **Factor trees:** we take a number $n$ and break it down into two factors of $n$. We then repeat this process with the resulting factors working recursively until the numbers we are left with are primes.
![Untitled Diagram-Page-1.drawio.png](../../img/Untitled%20Diagram-Page-1.drawio.png)
![Untitled Diagram-Page-1.drawio.png](../../_img/Untitled%20Diagram-Page-1.drawio.png)
_The prime factors of 27 are 2, 3, 3_
it doesn't matter which products we choose as the interim factors, we should always reach the same outcome:
![Untitled Diagram-Page-3.drawio 1.png](../../img/Untitled%20Diagram-Page-3.drawio%201.png)
![Untitled Diagram-Page-3.drawio 1.png](../../_img/Untitled%20Diagram-Page-3.drawio%201.png)
![Untitled Diagram-Page-2.drawio.png](../../img/Untitled%20Diagram-Page-2.drawio.png)
![Untitled Diagram-Page-2.drawio.png](../../_img/Untitled%20Diagram-Page-2.drawio.png)

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@ -68,7 +68,7 @@ This is still a bit long-winded however particularly when finding the factors of
A better method is to utilise [prime factorization](Prime%20factorization.md) combined with the canceling technique.
First we find the prime factors of both the numerator and denominator:
![drawio-Page-7.drawio.png](../../img/drawio-Page-7.drawio.png)
![drawio-Page-7.drawio.png](../../_img/drawio-Page-7.drawio.png)
This gives us:
@ -133,7 +133,7 @@ _Reduce the following fraction to its lowest terms: $$\frac{14y^5}{-35y^3}$$_
- Apply [Prime factorization](Prime%20factorization.md):
![draw.io-Page-8.drawio.png](../../img/draw.io-Page-8.drawio.png)
![draw.io-Page-8.drawio.png](../../_img/draw.io-Page-8.drawio.png)
- Cancel the coefficients and variable parts
@ -148,7 +148,7 @@ $$\frac{- 12xy^2}{ - 18xy^2}$$_
- Apply [Prime factorization](Prime%20factorization.md):
![draw.io-Page-8.drawio 1.png](../../img/draw.io-Page-8.drawio%201.png)
![draw.io-Page-8.drawio 1.png](../../_img/draw.io-Page-8.drawio%201.png)
- Cancel the coefficients and variable parts

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@ -46,7 +46,7 @@ Even though most modern computers use UEFI, it may still be referred to as BIOS
The de facto standard boot loader for Linux is GRUB: Grand Unified Boot Loader.
![](/img/grub.jpg)
![](/_img/grub.jpg)
You see the GRUB default menu when you first start a Linux machine. It will offer you various options for loading your installed OS or other OSs. GRUB is a filesystem like the main disk. If you press `e` in this screen you can view and edit specific boot parameters. Pressing `c` gives you access to the GRUB command line interface. This allows you to interact with GRUB in the same way as you would with any other filesystem, allowing for advanced configuration.

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@ -51,7 +51,7 @@ touch test.txt
Our `sda1` partition is now mounted at `mountpoint`. We can go ahead and create files. If we now look within the graphical file manager when we click on the `sda1` volume, we will see the new file we have created in `mountpoint`.
![](/img/mount-directory.png)
![](/_img/mount-directory.png)
## fstab

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@ -20,7 +20,7 @@ A disk is a mass storage [block_device](/Operating_Systems/Devices.md) which we
The following diagram represents the basic anatomy of a disk device.
![](/img/harddisk.png)
![](/_img/harddisk.png)
- A disk is divided up into [partitions](/Operating_Systems/Disks/Partitions.md) which are subsections of the overall disk. The kernel presents each partition as a [block device](/Operating_Systems/Devices.md) as it would with an entire disk.
- The disk dedicates a small part of its contents to a **partition table**: this defines the different partitions that comprise the total disk space.

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@ -14,7 +14,7 @@ It can be confusing to understand how the kernel and CPU interact with one anoth
However as a process, the kernel is the 'first amongst equals' given that it is the core embodiment of the operating system. At boot time, the kernel is injected into memory and at this point the CPU _looks to this address_ in memory in order to source its first instruction. That's how the kernel gets going. It is the first instruction that the CPU fetches and this is what allows the kernel to play its mediatory role. However most of the fetch, decode, execute cycles of the CPU take place independently of the kernel.
![](/img/kernel-cpu-interaction.svg)
![](/_img/kernel-cpu-interaction.svg)
> Fetch decode and execute refer to processor pipeline stages. They occur automatically as part of normal processor operation, the kernel doesnt generally have any direct control over how that happens...When the boot loader loads the kernel, it points the CPUs program counter to an entry point in the kernels code. From there, the CPU will continue executing (fetching decoding and executing) kernel code until you point the program counter to a userspace program, where it will continue executing userspace code until an interrupt points the program counter back into kernel code. Thats basically what the CPU will be doing from boot up to shut down; switching between executing kernel code and executing userspace code ([Reddit](https://www.reddit.com/r/osdev/comments/wdskj5/how_does_kernel_decide_if_use_cpu_or_gpu_after/))

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@ -13,7 +13,7 @@ Virtual memory is implemented at the level of the operating system and is an abs
When virtual memory is used, the CPU handles physical memory allocation and presents this to the kernel as an idealised representation. This means that the kernel and, by extension, programs and processes do not need to think about accessing the real memory blocks. This reduces complexity because often memory will be allocated in places that are non-contiguous with similar running processes or be located in the cache or swap memory on the disk.
![](/img/virtual-memory-diagram.jpg)
![](/_img/virtual-memory-diagram.jpg)
It would require considerable processing work for the kernel to be tracing these disparate memory sources at every instance. By working on an idealised (contiguous, unlimited) memory set the kernel can focus on task management and CPU sequencing as its primary task.

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@ -37,7 +37,7 @@ The final phase is unmounting: when the component is removed from the DOM:
6. `componentWillUnmount()`
![React component lifecycle](../../../img/react-lifecycle.png)
![React component lifecycle](../../../_img/react-lifecycle.png)
## Side-effects: why lifecycle phases matter

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@ -21,7 +21,7 @@ Many backend frameworks are synchronous but multithreaded. This means that a thr
If there was only one thread, this would be inefficient and unworkable. Therefore the framework will be multi-threaded: multiple request-response cycles can be executed at once by different threads.
![sync-thread.svg](/img/sync-thread.svg)
![sync-thread.svg](/_img/sync-thread.svg)
To accomodate the ability to increase the scale of synchronous applications you need to be able to spawn more threads commensurate to increased demand. This increases the resource consumption of the framework (more cores, more memory etc). Moreover it is possible to reach a point where all threads are active and no more can be spawned. In this case there will simply be delays in the return of data.
@ -29,7 +29,7 @@ To accomodate the ability to increase the scale of synchronous applications you
In contrast, Node only has a single thread but it works asynchronously, not synchronously. Thus it has a **single-threaded asynchronous architecture**. This means whilst there is only a single thread it can juggle responses by dispatching them asynchronously. When a request is made it sends it off and continues with its execution and handling new requests. Once these resolve, the data is returned to the main thread.
![async.svg](/img/async.svg)
![async.svg](/_img/async.svg)
## The Event Loop
@ -45,7 +45,7 @@ A running Node application is a single running process. Like everything that hap
The Event Loop comprises six phases. The Event Loop starts at the moment Node begins to execute your `index.js` file or any other application entry point. These six phases create one cycle, or loop, equal to one **tick**. A Node.js process exits when there is no more pending work in the Event Loop, or when `process.exit()` is called manually. A program only runs for as long as there are tasks queued in the Event Loop, or present on the [call stack](/Software_Engineering/Call_stack.md).
![](/img/node-event-loop.svg)
![](/_img/node-event-loop.svg)
The phases are as follows:

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@ -28,7 +28,7 @@ We can pinpoint specific dependencies in the `package.json`, e.g. `npm view [pac
See whether your dependency version is out of date use `npm outdated`. This gives us a table, for example:
![Pasted image 20220411082627.png](/img/Pasted_image_20220411082627.png)
![Pasted image 20220411082627.png](/_img/Pasted_image_20220411082627.png)
- _Latest_ tells us the latest release available from the developers
- _Wanted_ tells us the version that our `package.json` rules target. To take the first dependency as an example. We must have set our SemVer syntax to `^0.4.x` since it is telling us that there is a minor release that is more recent than the one we have installed but is not advising that we update to the latest major release.

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@ -19,7 +19,7 @@ router.get("/", (req, res) => {
Our server is now set up:
![](/img/server-listening.png)
![](/_img/server-listening.png)
> When creating our API this structure of creating handlers for specific routes will be iterated. Every endpoint will be specified with `[app].[http_request_type]` and followed by a callback.

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@ -11,7 +11,7 @@ tags:
This sets a general purpose computer aside from a special-purpose computer, like the one you might find in your dishwasher which may have its instructions hardwired or coded into the machine. Special purpose computers only perform a single set of tasks according to prewritten instructions. Well take the term _computer_ to mean general purpose computer.
Simplified model of what a computer is:
![1.4-Input-Process-Output.png](../img/1.4-Input-Process-Output.png)
![1.4-Input-Process-Output.png](../_img/1.4-Input-Process-Output.png)
Although the input, output and storage parts of a computer are very important, they will not be the focus of this course. Instead we are going to learn all about the process part, which will focus on how the computer is able to follow instructions to make calculations.
@ -35,9 +35,9 @@ Although the input, output and storage parts of a computer are very important, t
- But as these machines were expensive and slow, people used pre-computed tables in book form generated by human computers. Useful particularly for things like square roots.
- Similarly range tables were created that aided the military in calculating distances for gunboat artillery which factored in contextual factors like wind, drift, slope and elevation. These were used well into WW2 but they were limited to the particular type of cannon or shell
![Screenshot_2020-08-09_at_21.32.54 1.png](../img/Screenshot_2020-08-09_at_21.32.54%201.png)
![Screenshot_2020-08-09_at_21.32.54 1.png](../_img/Screenshot_2020-08-09_at_21.32.54%201.png)
![Screenshot_2020-08-09_at_21.34.48.png](../img/Screenshot_2020-08-09_at_21.34.48.png)
![Screenshot_2020-08-09_at_21.34.48.png](../_img/Screenshot_2020-08-09_at_21.34.48.png)
> Before the invention of actual computers, 'computer' was a job-title denoting people who were employed to conduct complex calculations, sometimes with the aid of machinery, but most often not. This persisted until the late 18th century when the word changed to include devices like adding machines.

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@ -10,7 +10,7 @@ tags:
A Turing Machine consists of an infinitely long tape, that has been divided up into cells. Each cell can contain either a 1, a 0 or an empty space. Above one cell of the tape is a head, which can either move left or right, and can read the symbols written in the cells. The head is also capable of erasing symbols and writing new symbols into the cells.
![Turing_machines_01.gif](../img/Turing_machines_01.gif)
![Turing_machines_01.gif](../_img/Turing_machines_01.gif)
The direction that the head moves, which values it erases, and which values it writes in, are dependent on a set of instructions provided to the machine.0
Different sets of instructions can be divided into **states.** States are like sub-routines and can themselves feature as part of instructions.

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@ -1,7 +1,7 @@
#!/bin/bash
# If there are images in _img/ that are not being used in the workspace, delete them
find /home/thomas/repos/computer_science/img -type f | while read filename; do
find /home/thomas/repos/computer_science/_img -type f | while read filename; do
rg "${filename##*/}" ../ --type markdown >/dev/null 2>&1
if [ "$?" -eq 1 ]; then
echo "Deleted unused image: ${filename##*/}"

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#!/bin/bash
# Replace all instances of `img` in Markdown image links with `_img` (to reflect new directory structure)
find /home/thomas/repos/computer_science/ -type f -name "*.md" | while
read file; do
sed -i 's/\/img\//\/_img\//g' $file
done