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<!--replace-end-7--><!--replace-end-4--><!--replace-end-1--></head><body><div class="ui fluid container universe"><!--replace-start-2--><!--replace-start-3--><!--replace-start-6--><div class="ui text container" id="zettel-container" style="position: relative"><div class="zettel-view"><article class="ui raised attached segment zettel-content"><div class="pandoc"><h1 id="title-h1">Clock signals</h1><p>In the examples of digital circuits so far (i.e <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: The half adder and full adder"><a href="Half_adder_and_full_adder.html">adders</a></span></span> and <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: Latches"><a href="Latches.html">latches</a></span></span>) everything happens in a single instant or over several repeated instances. This is because of how simple the circuits are. In the case of latches only a single bit is updated. And even with rippled adders they are just a series of 1-bit updaters in a chain.</p><p>With more complex circuits that use multiple memory devices which store a series of bits at once, we need a way to ensure that the bits are set at the same time. We do this by sequencing the execution with the pulses of the system clock.</p><p>A single iteration of the volatage rising and falling is a <strong>pulse</strong>. A complete oscillation from low to high and back to low is a <strong>cycle</strong>. As with all <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: Electromagnetism"><a href="Electromagnetism.html">electromagnetic</a></span></span> signals we measure the frequency of the wave in Hertz: cylcles per second. We also further distinguish the rising and falling edge of a pulse. Rising represents the signal passing from ground to its maximum voltage and falling is the reverse (the electrons moving from the voltage source to ground).</p><p>The diagram below shows a pulse cycle of 2Hz.</p><p><img src="/static/clock_pulses.png" /></p><h2 id="linking-components-to-the-clock">Linking components to the clock</h2><ul><li>All components that need to be synchronised are connected to the clock</li><li>State changes in the component occur only when a clock pulse occurs</li><li>Clock-driven components will typically trigger their state changes on either the rising edge or the falling edge of the pulse.</li><li>Components that trigger state changes on the rising pulse are <strong>positive edge-triggered</strong></li><li>Components that trigger state changes on the falling pulse are <strong>negative edge-triggered</strong></li></ul><p>The role of the clock is essential in the functioning of the <a href="CPU_architecture.md#the-system-clock">CPU</a>. It is the system clock that gives CPUs their performance rating: how many processes can execute within a given clock cycle.</p></div></article><nav class="ui attached segment deemphasized backlinksPane" id="neuron-backlinks-pane"><h3 class="ui header">Backlinks</h3><ul class="backlinks"><li><span class="zettel-link-container cf"><span class="zettel-link"><a href="Three_bit_counter.html">3-bit Counter</a></span></span><ul class="context-list" style="zoom: 85%;"><li class="item"><div class="pandoc"><p>The circuit will have three memory components, each representing one bit of the 3-bit number. When the <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: Clock signals"><a href="Clock_signals.html">clock pulses</a></span></span>, the 3-bit number increments by one. We need to synchronise the operation with a clock because each bit by itself is meaningless, it only gains meaning by the relation it sustains to the other two bits hence it must be kept in sync with them.</p></div></li></ul></li><li><span class="zettel-link-container cf"><span class="zettel-link"><a href="Flip_flops.html">Flip-Flops</a></span></span><ul class="context-list" style="zoom: 85%;"><li class="item"><div class="pandoc"><p>A flip-flop is a type of <span class="zettel-link-container cf"><span class="zettel-link" title="Zettel: Latches"><a
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